Figure 2 from Verilog synthesis of USB 2.0 full-speed device PHY IP | Semantic Scholar
Low Power USB 2.0 PHY IP for High-Volume Consumer Applications
USB2.0 PHY – シリコンライブラリ株式会社
USB 2.0/HSIC PHY (Host/Device/OTG/Hub) - IP Solution - INNOSILICON
Ch334 Usb2.0 High-speed Mtt 6kv Esd Built-in Usb Phy (480mbps) Low-cost, 20pcs/lot - Integrated Circuits - AliExpress
76892 - Versal: MIO USB 2.0 Interfaces
Block diagram of UFP type-C USB 2.0 without PD The USB 2.0 physical... | Download Scientific Diagram
USB 2.0 PHY Verification
Archimago's Musings: MEASUREMENTS: Computer USB port noise, USB hubs and the 8kHz PHY Microframe Packet Noise
PHY IP for USB 2.0 for TSMC | Cadence
USB v2.0 Soft PHY and Device Controller
USB 2.0 Solutions | Arasan Chip Systems
Soft Mixed Signal Corporation USB 2.0 PHY IP Cores
USB 2.0 PHY IP Core
USB2 PHY | Cadence
Products-UFS-Silicon Motion
The Next-Generation Interconnect | Mouser
Full Speed USB 2.0 Hub Controller - EEWeb
USB2 Controller | Cadence
PHY IP for USB 2.0 for TSMC | Cadence
USB 2.0 Extender Control Chip CH317 - NanjingQinhengMicroelectronics
